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DTSTAMP:20260522T150118Z
LOCATION:D171/173
DTSTART;TZID=America/Chicago:20181116T083000
DTEND;TZID=America/Chicago:20181116T084000
UID:submissions.supercomputing.org_SC18_sess145_wksp109@linklings.com
SUMMARY:Introduction - International Workshop on Performance, Portability,
  and Productivity in HPC (P3HPC)
DESCRIPTION:Douglas Doerfler (Lawrence Berkeley National Laboratory), Robe
 rt Neely (Lawrence Livermore National Laboratory), John Pennycook (Intel C
 orporation), and Kathryn O'Brien (IBM)\n\nThe ability for applications to 
 achieve both portability and high performance across computer architecture
 s remains an open challenge.  It is often unrealistic or undesirable for d
 evelopers to maintain separate implementations for each target architectur
 e, yet in many cases, achieving high performance and fully utilizing an ar
 chitecture’s underlying features requires the use of specialized language 
 constructs and libraries. Likewise, abstractions and standards that promis
 e portability cannot necessarily deliver high performance without addition
 al algorithmic considerations, and performance compromises are often made 
 to remain portable.  Application developers, who strive to work productive
 ly while balancing these concerns, often find the goal to be elusive. \n\n
 There is a clear need to develop ways of managing the complexity that aris
 es from system diversity that balance the need for performant specializati
 ons with the economy of appropriate and efficient abstractions.  Despite g
 rowth in the number of available architectures, there are similarities tha
 t represent general trends in current and emerging HPC hardware: increased
  thread parallelism; wider vector units; and deep, complex, memory hierarc
 hies.  This in turn offers some hope for common programming techniques and
  language support as community experience matures.\n\nThe purpose of this 
 workshop is to provide an opportunity for attendees to share ideas, practi
 cal experiences, and methodologies for tackling the challenge of achieving
  performance portability and developer productivity across current and fut
 ure homogeneous and heterogeneous computer architectures.\n\nTag: Heteroge
 neous Systems, Performance\n\nRegistration Category: Workshop Reg Pass\n\n
 Session Chair: Rob Neely (Lawrence Livermore National Laboratory)\n\n
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