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DTSTAMP:20260522T150128Z
LOCATION:D174
DTSTART;TZID=America/Chicago:20181116T084000
DTEND;TZID=America/Chicago:20181116T090000
UID:submissions.supercomputing.org_SC18_sess146_ws_ftxs101@linklings.com
SUMMARY:Toward Ad Hoc Recovery For Soft Errors
DESCRIPTION:Nuria Losada (University of A Coruña, Spain) and Leonardo Baut
 ista-Gomez, Kai Keller, and Osman Unsal (Barcelona Supercomputing Center)\
 n\nThe coming exascale era is a great opportunity for high performance com
 puting (HPC) applications. However, high failure rates on these systems wi
 ll hazard the successful completion of their execution. Bit-flip errors in
  dynamic random access memory (DRAM) account for a noticeable share of the
  failures in supercomputers. Hardware mechanisms, such as error correcting
  code (ECC), can detect and correct single-bit errors and can detect some 
 multi-bit errors while others can go undiscovered. Unfortunately, detected
  multi-bit errors will most of the time force the termination of the appli
 cation and lead to a global restart. Thus, other strategies at the softwar
 e level are needed to tolerate these type of faults more efficiently and t
 o avoid a global restart. In this work, we extend the FTI checkpointing li
 brary to facilitate the implementation of custom recovery strategies for M
 PI applications, minimizing the overhead introduced when coping with soft 
 errors. The new functionalities are evaluated by implementing local forwar
 d recovery on three HPC benchmarks with different reliability requirements
 . Our results demonstrate a reduction on the recovery times by up to 14%.\
 n\nTag: Resiliency, Scientific Computing\n\nRegistration Category: Worksho
 p Reg Pass\n\n
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