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DTSTAMP:20260522T150117Z
LOCATION:D174
DTSTART;TZID=America/Chicago:20181116T115000
DTEND;TZID=America/Chicago:20181116T121000
UID:submissions.supercomputing.org_SC18_sess146_ws_ftxs120@linklings.com
SUMMARY:Influence of A-Posteriori Subcell Limiting on Fault Frequency in H
 igher-Order DG Schemes
DESCRIPTION:Anne Reinarz, Jean-Mathieu Gallard, and Michael Bader (Technic
 al University Munich)\n\nSoft error rates are increasing as modern archite
 ctures require increasingly small features at low voltages. Due to the lar
 ge number of components used in HPC architectures, these are particularly 
 vulnerable to soft errors. Hence, when designing applications that run for
  long time periods on large machines, algorithmic resilience must be taken
  into account. In this paper we analyse the inherent resiliency of a-poste
 riori limiting procedures in the context of the explicit ADER DG hyperboli
 c PDE solver ExaHyPE. The a-posteriori limiter checks element-local high-o
 rder DG solutions for physical admissibility, and can thus be expected to 
 also detect hardware-induced errors.  Algorithmically, it can be interpret
 ed as element-local checkpointing and restarting of the solver with a more
  robust finite volume scheme on a fine subgrid. We show that the limiter i
 ndeed increases the resilience of the DG algorithm, detecting and correcti
 ng particularly those faults which would otherwise lead to a fatal failure
 .\n\nTag: Resiliency, Scientific Computing\n\nRegistration Category: Works
 hop Reg Pass\n\n
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