BEGIN:VCALENDAR VERSION:2.0 PRODID:Linklings LLC BEGIN:VTIMEZONE TZID:America/Chicago X-LIC-LOCATION:America/Chicago BEGIN:DAYLIGHT TZOFFSETFROM:-0600 TZOFFSETTO:-0500 TZNAME:CDT DTSTART:19700308T020000 RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0500 TZOFFSETTO:-0600 TZNAME:CST DTSTART:19701101T020000 RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260522T150116Z LOCATION:D170 DTSTART;TZID=America/Chicago:20181111T090000 DTEND;TZID=America/Chicago:20181111T173000 UID:submissions.supercomputing.org_SC18_sess149@linklings.com SUMMARY:MCHPC’18: Workshop on Memory Centric High Performance Computing DESCRIPTION:Workshop Morning Break\n---------------------\nExploring Alloc ation Policies in Disaggregated Non-Volatile Memories\n\nMany modern appli cations have memory footprints that are increasingly large, driving system memory capacities higher and higher. However, due to the diversity of app lications that run on High-Performance Computing (HPC) systems, the memory utilization can fluctuate widely from one application to ano...\n\n\nVams ee Reddy Kommareddy (University of Central Florida), Clayton Hughes and Si mon David Hammond (Sandia National Laboratories), and Amro Awad (Universit y of Central Florida)\n---------------------\nMCHPC'18 Panel: Research Ch allenges in Memory-Centric Computing\n\nMaya Gokhale (Lawrence Livermore N ational Laboratory)\n---------------------\nEvaluation of Intel Memory Dri ve Technology Performance for Scientific Applications\n\nIn this paper, we present benchmark data for Intel Memory Drive Technology (IMDT), which is a new generation of Software-defined Memory (SDM) based on Intel ScaleMP collaboration and using 3D XPoint TM based Intel Solid-State Drives (SSDs) called Optane. We studied IMDT performance for synthetic ben...\n\n\nVlad imir Mironov (Lomonosov Moscow State University), Andrey Kudryavtsev (Inte l Corporation), Yuri Alexeev (Argonne National Laboratory), Alexander Mosk ovsky (RSC Technologies), and Igor Kulikov and Igor Chernykh (Institute of Computational Mathematics and Mathematical Geophysics SB RAS)\n---------- -----------\nHeterogeneous Memory and Arena-Based Heap Allocation\n\nNonun iform Memory Access (NUMA) will likely continue to be the chief abstractio n used to expose heterogeneous memory. One major problem with using NUMA i n this way is, the assignment of memory to devices, mediated by the hardwa re and Linux OS, is only resolved to page granularity. That is, pages, no. ..\n\n\nSean Williams (New Mexico Consortium) and Latchesar Ionkov, Michae l Lang, and Jason Lee (Los Alamos National Laboratory)\n------------------ ---\nA Preliminary Study of Compiler Transformations for Graph Application s on the Emu System\n\nUnlike dense linear algebra applications, graph app lications typically suffer from poor performance because of 1) inefficient utilization of memory systems through random memory accesses to graph dat a, and 2) overhead of executing atomic operations. Hence, there is a rapid growth in improving both s...\n\n\nPrasanth Chatarasi and Vivek Sarkar (G eorgia Institute of Technology)\n---------------------\nxBGAS: Toward a RI SC-V ISA Extension for Global, Scalable, Shared Memory\n\nGiven the switch from monolithic architectures to integrated systems of commodity componen ts, scalable high performance computing architectures often suffer from un wanted latencies when operations depart an individual device domain. Tran sferring control and/or data across loosely coupled commodity ...\n\n\nJoh n Leidel (Tactical Computing Laboratories), Xi Wang and Yong Chen (Texas T ech University), David Donofrio and Farzad Fatollahi-Fard (Lawrence Berkel ey National Laboratory), and Kurt Keville (Massachusetts Institute of Tech nology)\n---------------------\nWorkshop Afternoon Break\n---------------- -----\nWorkshop Lunch (on your own)\n---------------------\nMCHPC'18 Morni ng Keynote: Converging Storage and Memory\n\nOrder of magnitude advances i n non-volatile memory density and performance are upon us bringing signifi cant systems level architecture opportunities. The NAND Memory transition to 3D and the introduction of QLC have recently increased NAND SSD storage density at a very rapid pace. Products featuring...\n\n\nFrank Hady (Inte l Corporation)\n---------------------\nChallenges of High-Capacity DRAM St acks and Potential Directions\n\nWith rapid growth in data volumes and an increase in number of CPU/GPU cores per chip, the capacity and bandwidth o f main memory can be scaled up to accommodate performance requirements of data-intensive applications. Recent 3D-stacked in-package memory devices s uch as high-bandwidth memory (HBM) an...\n\n\nAmin Farmahini-Farahani, Sud hanva Gurumurthi, Gabriel Loh, and Mike Ignatowski (Advanced Micro Devices Inc)\n---------------------\nData Placement Optimization in GPU Memory Hi erarchy Using Predictive Modeling\n\nModern supercomputers often use Graph ic Processing Units (or GPUs) to meet the ever-growing demands for high pe rformance computing. GPUs typically have a complex memory architecture wit h various types of memories and caches, such as global memory, shared memo ry, constant memory, and texture memory.T...\n\n\nLarisa Stoltzfus (Univer sity of Edinburgh) and Murali Emani, Pei-Hung Lin, and Chunhua Liao (Lawre nce Livermore National Laboratory)\n---------------------\nOn the Applicab ility of PEBS-Based Online Memory Access Tracking for Heterogeneous Memory Management at Scale\n\nOperating systems have historically had to manage only a single type of memory device. The imminent availability of heteroge neous memory devices based on emerging memory technologies confronts the c lassic single memory model and opens a new spectrum of possibilities for m emory management. Transparen...\n\n\nAleix Roca Nonell (Barcelona Supercom puting Center, Polytechnic University of Catalonia); Balazs Gerofi (RIKEN) ; Leonardo Bautista-Gomez (Barcelona Supercomputing Center); Dominique Mar tinet (Atomic Energy and Alternative Energies Commission (CEA)); Vicenç Be ltran Querol (Barcelona Supercomputing Center); and Yutaka Ishikawa (RIKEN )\n---------------------\nUnderstanding Application Recomputability withou t Crash Consistency in Non-Volatile Memory\n\nEmerging non-volatile memory (NVM) is promising to be used as main memory, because of its good perform ance, density, and energy efficiency. Leveraging the non-volatility of NV M as main memory, we can recover data objects and resume application compu tation (recomputation) after application crashes. ...\n\n\nJie Ren, Kai Wu , and Dong Li (University of California, Merced)\n---------------------\nI ntroduction - MCHPC’18: Workshop on Memory Centric High Performance Comput ing\n\nThe growing disparity between CPU speed and memory speed, known as the memory wall problem, has been one of the most critical and long-standi ng challenges in the computing industry. The situation is further complica ted by the recent expansion of the memory hierarchy, which is becoming dee per and mor...\n\n\nYonghong Yan (University of South Carolina), Ron Brigh twell (Sandia National Laboratories), Xian-He Sun (Illinois Institute of T echnology), and Maya Gokhale (Lawrence Livermore National Laboratory)\n--- ------------------\nMCHPC'18 Afternoon Keynote: All Tomorrow’s Memory Syst ems\n\nMemory and communication are the primary reasons that our time-to-s olution is no better than it currently is … the memory system is slow; the communication overhead is high; and yet a significant amount of research is still focused on increasing processor performance, rather than decreasi ng (the cos...\n\n\nBruce Jacob (University of Maryland)\n\nTag: Memory, N VRAM, Parallel Programming Languages, Libraries, and Models\n\nRegistratio n Category: Workshop Reg Pass\n\nSession Chairs: Ron Brightwell (Sandia Na tional Laboratories); Maya Gokhale (Lawrence Livermore National Laboratory (LLNL)); Xian-He Sun (Illinois Institute of Technology); and Yonghong Yan (University of North Carolina, Charlotte) END:VEVENT END:VCALENDAR