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DTSTART:19700308T020000
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DTSTART;TZID=America/Chicago:20181111T090200
DTEND;TZID=America/Chicago:20181111T100000
UID:submissions.supercomputing.org_SC18_sess149_pec307@linklings.com
SUMMARY:MCHPC'18 Morning Keynote: Converging Storage and Memory
DESCRIPTION:Frank Hady (Intel Corporation)\n\nOrder of magnitude advances 
 in non-volatile memory density and performance are upon us bringing signif
 icant systems level architecture opportunities. The NAND Memory transition
  to 3D and the introduction of QLC have recently increased NAND SSD storag
 e density at a very rapid pace. Products featuring one terabit per die are
  available from Intel® Corporation allowing dense storage, for example one
  PByte in 1U. This large improvement in density brings great value to syst
 ems, but also increases the performance/capacity/cost gap between DRAM and
  storage within the long evolving memory and storage hierarchy. Intel® 3D 
 XPoint™ Memory, with much higher performance than NAND and greater density
  than DRAM has entered the platform to address this gap - first as SSDs. T
 hese Intel® Optane™ SSDs are in use within client and data center platform
 s as both fast storage volumes and as paged extensions to system memory de
 livering significant application performance improvements. With low latenc
 y and fine grained addressability, this new memory can be accessed as Pers
 istent Memory (PM), avoiding the 4kByte block size and multiple microsecon
 d storage stack that accompany system storage. This Intel® Optane Data Cen
 ter Persistent Memory is made possible through a series of hardware and so
 ftware advances. The resulting high capacity, high performance, persistent
  memory creates opportunities for rethinking algorithms to deliver much hi
 gher performance applications. This presentation will explain these new me
 mory technologies, explore their impact on the computing system at the arc
 hitecture and solution level, and suggest areas of platform exploration re
 levant to the HPC community.\n\nTag: Memory, NVRAM, Parallel Programming L
 anguages, Libraries, and Models\n\nRegistration Category: Workshop Reg Pas
 s\n\nSession Chairs: Ron Brightwell (Sandia National Laboratories); Maya G
 okhale (Lawrence Livermore National Laboratory (LLNL)); Xian-He Sun (Illin
 ois Institute of Technology); and Yonghong Yan (University of North Caroli
 na, Charlotte)\n\n
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