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DTSTART;TZID=America/Chicago:20181111T103000
DTEND;TZID=America/Chicago:20181111T105200
UID:submissions.supercomputing.org_SC18_sess149_ws_mchpc105@linklings.com
SUMMARY:Challenges of High-Capacity DRAM Stacks and Potential Directions
DESCRIPTION:Amin Farmahini-Farahani, Sudhanva Gurumurthi, Gabriel Loh, and
  Mike Ignatowski (Advanced Micro Devices Inc)\n\nWith rapid growth in data
  volumes and an increase in number of CPU/GPU cores per chip, the capacity
  and bandwidth of main memory can be scaled up to accommodate performance 
 requirements of data-intensive applications. Recent 3D-stacked in-package 
 memory devices such as high-bandwidth memory (HBM) and similar technologie
 s can provide high amounts of memory bandwidth at low access energy. Howev
 er, 3D-stacked in-package memory have limited memory capacity. In this pap
 er, we study and present challenges of scaling the capacity of 3D-stacked 
 memory devices by stacking more DRAM dies within a device and building tal
 ler memory stacks. We also present potential directions and mitigations to
  building tall HBM stacks of DRAM dies. Although taller stacks are a poten
 tially interesting approach to increase HBM capacity, we show that more re
 search is needed to enable high-capacity memory stacks while simultaneousl
 y scaling up their memory bandwidth. Specifically, alternative bonding and
  stacking technologies can be investigated as a potentially major enabler 
 of tall HBM stacks.\n\nTag: Memory, NVRAM, Parallel Programming Languages,
  Libraries, and Models\n\nRegistration Category: Workshop Reg Pass\n\nSess
 ion Chairs: Ron Brightwell (Sandia National Laboratories); Maya Gokhale (L
 awrence Livermore National Laboratory (LLNL)); Xian-He Sun (Illinois Insti
 tute of Technology); and Yonghong Yan (University of North Carolina, Charl
 otte)\n\n
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