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LOCATION:D170
DTSTART;TZID=America/Chicago:20181111T115200
DTEND;TZID=America/Chicago:20181111T121400
UID:submissions.supercomputing.org_SC18_sess149_ws_mchpc114@linklings.com
SUMMARY:A Preliminary Study of Compiler Transformations for Graph Applicat
 ions on the Emu System
DESCRIPTION:Prasanth Chatarasi and Vivek Sarkar (Georgia Institute of Tech
 nology)\n\nUnlike dense linear algebra applications, graph applications ty
 pically suffer from poor performance because of 1) inefficient utilization
  of memory systems through random memory accesses to graph data, and 2) ov
 erhead of executing atomic operations. Hence, there is a rapid growth in i
 mproving both software and hardware platforms to address the above challen
 ges. One such improvement in the hardware platform is a realization of the
  Emu system, a thread migratory and near-memory processor. In the Emu syst
 em, a thread responsible for computation on a datum is automatically migra
 ted over to a node where the data resides without any intervention from th
 e programmer. The idea of thread migrations is very well suited to graph a
 pplications as memory accesses of the applications are irregular. However,
  thread migrations can hurt the performance of graph applications if overh
 ead from the migrations dominates benefits achieved through the migrations
 .\n\nIn this preliminary study, we explore two high-level compiler optimiz
 ations, i.e., loop fusion and edge flipping, and one low-level compiler tr
 ansformation leveraging hardware support for remote atomic updates to addr
 ess overheads arising from thread migration, creation, synchronization, an
 d atomic operations. We performed a preliminary evaluation of these compil
 er transformations by manually applying them on three graph applications o
 ver a set of RMAT graphs from Graph500.—Conductance, Bellman-Ford’s algori
 thm for the single-source shortest path problem, and Triangle Counting. Ou
 r evaluation targeted a single node of the Emu hardware prototype, and has
  shown an overall geometric mean reduction of 22.08% in thread migrations.
 \n\nTag: Memory, NVRAM, Parallel Programming Languages, Libraries, and Mod
 els\n\nRegistration Category: Workshop Reg Pass\n\nSession Chairs: Ron Bri
 ghtwell (Sandia National Laboratories); Maya Gokhale (Lawrence Livermore N
 ational Laboratory (LLNL)); Xian-He Sun (Illinois Institute of Technology)
 ; and Yonghong Yan (University of North Carolina, Charlotte)\n\n
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