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DTSTART;TZID=America/Chicago:20181111T161000
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UID:submissions.supercomputing.org_SC18_sess156_pec215@linklings.com
SUMMARY:Domain-Specific System on Chips (DSSoC)
DESCRIPTION:Tom Rondeau (Defense Advanced Research Projects Agency (DARPA)
 , Domain-Specific System on Chip (DSSoC) Program)\n\nThe invention of the 
 digital computer came about as a proof of computable numbers, and so numer
 ical processing was solved by the Turing Machine that has led to the gener
 al purpose computer. These computers are good at solving multiple types of
  problems with a single machine. However, within the scope of computable n
 umbers are specific computational problems where purpose-built machines ca
 n solve them faster while using less energy. An example of this is the dig
 ital signal processor (DSP) that performs the multiply and accumulate oper
 ation important to signal processing, or the more recent development of th
 e tensor processing unit (TPU) to compute dense matrix multiplies that are
  at the core of deep neural networks. These specialized machines solve a s
 ingle problem but with optimized efficiency.\n\nAs a result, there exists 
 a tension between the flexibility in general purpose processors and the ef
 ficiency of specialized processors. Domain-Specific System on Chip (DSSoC)
  intends to demonstrate that the tradeoff between flexibility and efficien
 cy is not fundamental. The program will develop a method for determining t
 he right amount and type of specialization while making a system as progra
 mmable and flexible as possible. It will take a vertical view of integrati
 ng today’s programming environment with a goal of full-stack integration. 
 DSSoC will de-couple the programmer from the underlying hardware with enou
 gh abstraction but still be able to utilize the hardware optimally through
  intelligent scheduling. DSSoC specifically targets embedded systems where
  the domain of applications sits at the edge and near the sensor. Workload
 s consist of small chunks of data but often with a large number of algorit
 hms required in the processing, meaning that high compute power and low la
 tency at low power are required.\n\nThis presentation will explore the con
 cepts being developed in the DSSoC program, including an overview of the p
 rojects being funded to study the research questions and produce technolog
 y that furthers industry’s ability to effectively use specialization withi
 n our SoCs.\n\nTag: Architectures, Heterogeneous Systems, Quantum Computin
 g\n\nRegistration Category: Workshop Reg Pass\n\nSession Chair: Jeffrey S.
  Vetter (Oak Ridge National Laboratory (ORNL))\n\n
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