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DTSTART;TZID=America/Chicago:20181111T143300
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UID:submissions.supercomputing.org_SC18_sess160_ws_whpc124@linklings.com
SUMMARY:Power Aware Heterogeneous Node Assembly
DESCRIPTION:Bilge Acun (IBM Research)\n\nTo meet ever increasing computati
 onal requirements, supercomputers and data centers are beginning to utiliz
 e fat compute nodes with multiple hardware components such as manycore CPU
 s and accelerators. These components have intrinsic power variations even 
 among same model components from same manufacturer. In this paper, we argu
 e that node assembly techniques that consider these intrinsic power variat
 ions can achieve better power efficiency without any performance trade off
  on large scale supercomputing facilities and data centers. We propose thr
 ee different node assembly techniques: (1) Sorted Assembly, (2) Balanced P
 ower Assembly, and (3) Application-Aware Assembly. In Sorted Assembly, nod
 e components are categorized (or sorted) into groups according to their po
 wer efficiency, and components from the same group are assembled into a no
 de. In Balanced Power Assembly, components are assembled to minimize node-
 to-node power variations. In Application-Aware Assembly, the most heavily 
 used components by the application are selected based on the highest power
  efficiency. We evaluate the effectiveness and cost savings of the three t
 echniques compared to the standard random assembly under different node co
 unts and variability scenarios.\n\nTag: Diversity, Education, Hot Topics\n
 \nRegistration Category: Workshop Reg Pass\n\nSession Chairs: Toni Collis 
 (Women in High Performance Computing); Weronika Filinger (Edinburgh Parall
 el Computing Centre (EPCC); University of Edinburgh, Scotland); and Misbah
  Mubarak (Amazon Web Services)\n\n
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