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DTSTART;TZID=America/Chicago:20181111T153000
DTEND;TZID=America/Chicago:20181111T154700
UID:submissions.supercomputing.org_SC18_sess165_ws_eduhpcp112@linklings.co
 m
SUMMARY:Toward Developing a Repository of Logical Errors Observed in Paral
 lel Code for Teaching Code Correctness
DESCRIPTION:Trung Nguyen (University of Massachusetts) and Ritu Arora (Tex
 as Advanced Computing Center, University of Texas)\n\nDebugging parallel p
 rograms can be a challenging task, especially for the beginners. While par
 allel debuggers like DDT and TotalView can be extremely useful in tracking
  down the program statements that are connected to the bugs, often the onu
 s is on the programmers to reason about the logic of the program statement
 s in order to fix the bugs in them. These debuggers may neither be able to
  precisely indicate the logical errors in the parallel programs nor they m
 ay provide information on fixing those errors. Therefore, there is a need 
 for developing tools and educational content on teaching the pitfalls in p
 arallel programming and writing correct code. Such content can help in gui
 ding the beginners in avoiding commonly observed logical errors and in ver
 ifying the correctness of their parallel programs. In this paper, we 1) en
 umerate some of the logical errors that we have seen in the parallel progr
 ams that were written by the beginners working with us, and 2) discuss the
  ways to fix those errors. The documentation on these logical errors can c
 ontribute in enhancing the productivity of the beginners, and can potentia
 lly help them in their debugging efforts. We have added the code samples c
 ontaining the logical errors and their solutions in a Github repository so
  that the others in the community can reproduce the errors on their system
 s and learn from them. The content presented in this paper may also be use
 ful for those developing high-level tools for detecting and removing logic
 al errors in parallel programs.\n\nTag: Diversity, Education\n\nRegistrati
 on Category: Workshop Reg Pass\n\n
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