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DTSTART:19700308T020000
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DTSTAMP:20260522T150127Z
LOCATION:D172
DTSTART;TZID=America/Chicago:20181112T112000
DTEND;TZID=America/Chicago:20181112T114500
UID:submissions.supercomputing.org_SC18_sess168_ws_ia106@linklings.com
SUMMARY:Impact of Traditional Sparse Optimizations on a Migratory Thread A
 rchitecture
DESCRIPTION:Thomas B. Rolinger (University of Maryland, Laboratory for Phy
 sical Sciences at University of Maryland) and Christopher D. Krieger (Labo
 ratory for Physical Sciences at University of Maryland)\n\nAchieving high 
 performance for sparse applications is challenging due to irregular access
  patterns and weak locality. These properties preclude many static optimiz
 ations and degrade cache performance on traditional systems. To address th
 ese challenges, novel systems such as the Emu architecture have been propo
 sed. The Emu design uses light-weight migratory threads, narrow memory, an
 d near-memory processing capabilities to address weak locality and reduce 
 the total load on the memory system. Because the Emu architecture is funda
 mentally different than cache based hierarchical memory systems, it is cru
 cial to understand the cost-benefit tradeoffs of standard sparse algorithm
  optimizations on Emu hardware. In this work, we explore sparse matrix-vec
 tor multiplication (SpMV) on the Emu architecture. We investigate the effe
 cts of different sparse optimizations such as dense vector data layouts, w
 ork distributions, and matrix reorderings. Our study finds that initially 
 distributing work evenly across the system is inadequate to maintain load 
 balancing over time due to the migratory nature of Emu threads.  In severe
  cases, matrix sparsity patterns produce hot-spots as many migratory threa
 ds converge on a single resource. We demonstrate that known matrix reorder
 ing techniques can improve SpMV performance on the Emu architecture by as 
 much as 70% by encouraging more consistent load balancing. This can be com
 pared with a performance gain of no more than 16% on a cache-memory based 
 system.\n\nTag: Architectures, Data Analytics, Graph Algorithms\n\nRegistr
 ation Category: Workshop Reg Pass\n\nSession Chairs: Vito Giovanni Castell
 ana (Pacific Northwest National Laboratory (PNNL)), John Feo (Pacific Nort
 hwest National Laboratory (PNNL)), and Antonino Tumeo (Pacific Northwest N
 ational Laboratory (PNNL))\n\n
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