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DTSTAMP:20260522T150124Z
LOCATION:D172
DTSTART;TZID=America/Chicago:20181112T121000
DTEND;TZID=America/Chicago:20181112T123500
UID:submissions.supercomputing.org_SC18_sess168_ws_ia121@linklings.com
SUMMARY:Scale-Free Graph Processing on a NUMA Machine
DESCRIPTION:Tanuj K. Aasawat, Tahsin Reza, and Matei Ripeanu (University o
 f British Columbia)\n\nModern shared-memory systems embrace the NUMA archi
 tecture which has proven to be more scalable than the SMP architecture. In
  many ways, a NUMA system resembles a shared-nothing distributed system: p
 hysically distinct processing units and memory regions. Memory accesses to
  remote NUMA domains are more expensive than local accesses. This poses th
 e opportunity to transfer the know-how and design of distributed graph pro
 cessing to develop shared-memory graph processing solutions optimized for 
 NUMA systems. To this end, we explore if a distributed-memory like middlew
 are that makes graph partitioning and communication between partitions exp
 licit, can improve the performance on a NUMA system. We design and impleme
 nt a NUMA aware graph processing framework that embraces design philosophi
 es of distributed graph processing system: in particular explicit partitio
 ning and inter-partition communication, and at the same time exploits opti
 mization opportunities specific to single-node systems. We demonstrate up 
 to 13.9x speedup over a state-of-the-art NUMA-aware framework, Polymer and
  up to 3.7x scalability on a four-socket NUMA machine using graphs with te
 ns of billions of edges.\n\nTag: Architectures, Data Analytics, Graph Algo
 rithms\n\nRegistration Category: Workshop Reg Pass\n\nSession Chairs: Vito
  Giovanni Castellana (Pacific Northwest National Laboratory (PNNL)), John 
 Feo (Pacific Northwest National Laboratory (PNNL)), and Antonino Tumeo (Pa
 cific Northwest National Laboratory (PNNL))\n\n
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