BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260522T150117Z
LOCATION:D166
DTSTART;TZID=America/Chicago:20181112T113000
DTEND;TZID=America/Chicago:20181112T120000
UID:submissions.supercomputing.org_SC18_sess173_ws_espm102@linklings.com
SUMMARY:Integration of CUDA Processing within the C++ Library for Parallel
 ism and Concurrency (HPX)
DESCRIPTION:Patrick Diehl, Hartmut Kaiser, and Thomas Heller (Louisiana St
 ate University) and Madhavan Seshadri (Nanyang Technological University, S
 ingapore)\n\nExperience shows that on today's high performance systems, th
 e utilization of different acceleration cards in conjunction with a high u
 tilization of all other parts of the system is difficult. Future architect
 ures, like exascale clusters, are expected to aggravate this issue as the 
 number of cores are expected to increase and memory hierarchies are expect
 ed to become deeper. One big aspect for distributed applications is to gua
 rantee high utilization of all available resources, including local or rem
 ote acceleration cards on a cluster while fully using all the available CP
 U resources and the integration of the GPU work into the overall programmi
 ng model.\n\nFor the integration of CUDA code we extended HPX and enabled 
 asynchronous data transfers from and to the GPU device and the asynchronou
 s invocation of CUDA kernels on this data.  Both operations are well integ
 rated into the general programming model of HPX which allows to seamlessly
  overlap any GPU operation with work on the main cores. Any user-defined C
 UDA kernel can be launched.\n\nWe present asynchronous implementations for
  the data transfers and kernel launches for CUDA code as part of a HPX asy
 nchronous execution graph. Using this approach we can combine all remotely
  and locally available acceleration cards on a cluster to utilize its full
  performance capabilities.  Overhead measurements show, that the integrati
 on of the asynchronous operations as part of the HPX execution graph impos
 es no additional computational overhead and significantly eases orchestrat
 ing coordinated and concurrent work on the main cores and the used GPU dev
 ices.\n\nTag: Accelerators, Exascale, Parallel Programming Languages, Libr
 aries, and Models\n\nRegistration Category: Workshop Reg Pass\n\nSession C
 hairs: Dhabaleswar K. (DK) Panda (The Ohio State University), Karl Schulz 
 (Advanced Micro Devices (AMD) Inc), and Hari Subramoni (The Ohio State Uni
 versity)\n\n
END:VEVENT
END:VCALENDAR