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DTSTART:19700308T020000
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DTSTAMP:20260522T150116Z
LOCATION:C140/142
DTSTART;TZID=America/Chicago:20181113T113000
DTEND;TZID=America/Chicago:20181113T120000
UID:submissions.supercomputing.org_SC18_sess194_pap157@linklings.com
SUMMARY:Light-Weight Protocols for Wire-Speed Ordering
DESCRIPTION:Hans Eberle and Larry Dennison (Nvidia Corporation)\n\nWe desc
 ribe light-weight protocols for selective packet ordering in out-of-order 
 networks that carry memory traffic. The protocols are designed for heterog
 eneous high-performance systems, in particular, accelerated systems with e
 ndpoints that have few resources available for interfacing the network.\n\
 nThe protocols preserve the semantics of a relaxed memory ordering model a
 s adopted by highly-threaded many-core processors and accelerators.\n\nThe
  protocols achieve link-rate performance through the following techniques:
  (1) speculative connection setup avoids round-trip delays found in protoc
 ols with little knowledge about endpoint resources, (2) target-side orderi
 ng avoids round-trip delays found in source-side ordering mechanisms, (3) 
 fine-grained ordering removes dependencies unwarranted by program code avo
 iding cumulative ordering dependencies caused by coarse-grained ordering, 
 (4) ordering relaxations and optimizations for producer/consumer communica
 tion patterns.\n\nWe describe two ordering protocols that provide (1) stri
 ct sequential ordering and (2) relaxed ordering for multi-packet transfers
 . The protocols impose no restrictions on routing, including multipath rou
 ting.\n\nTag: Architectures, Data Analytics, Networks\n\nRegistration Cate
 gory: Tech Program Reg Pass\n\nFinalist: BP Finalist\n\nSession Chair: Mad
 eleine Glick (Columbia University)\n\n
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