BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260522T150128Z
LOCATION:C141/143/149
DTSTART;TZID=America/Chicago:20181114T153000
DTEND;TZID=America/Chicago:20181114T170000
UID:submissions.supercomputing.org_SC18_sess215@linklings.com
SUMMARY:Arithmetic and Optimization
DESCRIPTION:Harnessing GPU's Tensor Cores Fast FP16 Arithmetic to Speedup 
 Mixed-Precision Iterative Refinement Solvers\n\nThe use of low-precision a
 rithmetic in computing methods has been a powerful tool to accelerate nume
 rous scientific computing applications including Artificial Intelligence. 
 We present an investigation showing that other HPC applications can harnes
 s this power too, and in particular, the general HPC...\n\n\nAzzam Haidar 
 (University of Tennessee, Innovative Computing Laboratory); Stan Tomov and
  Jack Dongarra (University of Tennessee); and Nicholas Higham (University 
 of Manchester, School of Mathematics)\n---------------------\nADAPT: Algor
 ithmic Differentiation Applied to Floating-Point Precision Tuning\n\nHPC a
 pplications extensively use floating point arithmetic operations to solve 
 computational problems in various domains. Mixed precision computing, use 
 of lowest precision data type sufficient to achieve a desired accuracy, ha
 ve been explored to improve performance, reduce power consumption and dat.
 ..\n\n\nHarshitha Menon (Lawrence Livermore National Laboratory); Michael 
 O. Lam (James Madison University, Lawrence Livermore National Laboratory);
  and Daniel Osei-Kuffuor, Markus Schordan, Scott Lloyd, Kathryn Mohror, an
 d Jeffrey Hittinger (Lawrence Livermore National Laboratory)\n------------
 ---------\nAssociative Instruction Reordering to Alleviate Register Pressu
 re\n\nRegister allocation is generally considered a practically solved pro
 blem. For most applications, the register allocation strategies in product
 ion compilers are very effective in controlling the number of loads/stores
  and register spills. However, existing register allocation strategies are
  not effec...\n\n\nPrashant Singh Rawat, Aravind Sukumaran-Rajam, and Atan
 as Rountev (Ohio State University); Fabrice Rastello (French Institute for
  Research in Computer Science and Automation (INRIA)); Louis-Noel Pouchet 
 (Colorado State University); and P. Sadayappan (Ohio State University)\n\n
 Tag: Algorithms, Applications, Architectures, Compiler Analysis and Optimi
 zation, Floating Point, Performance, Precision, Programming Systems, Tools
 \n\nRegistration Category: Tech Program Reg Pass\n\nSession Chair: Protonu
  Basu (NVIDIA)
END:VEVENT
END:VCALENDAR