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DTSTAMP:20260522T150108Z
LOCATION:C145
DTSTART;TZID=America/Chicago:20181112T083000
DTEND;TZID=America/Chicago:20181112T170000
UID:submissions.supercomputing.org_SC18_sess249@linklings.com
SUMMARY:Application Porting and Optimization on GPU-Accelerated POWER Arch
 itectures
DESCRIPTION:Application Porting and Optimization on GPU-Accelerated POWER 
 Architectures\n\nThe POWER processor has re-emerged as a technology for su
 percomputer architectures. One major reason is the tight integration of pr
 ocessor and GPU accelerator through the NVLink technology. Two major sites
  in the US, ORNL and LLNL, have already decided to have their pre-exascale
  systems being based ...\n\n\nDirk Pleiter (Juelich Supercomputing Centre)
 , Christoph Hagleitner (IBM Zurich Research Laboratory), Andreas Herten (J
 uelich Supercomputing Centre), Tom Papatheodore (Oak Ridge National Labora
 tory), Archana Ravindar (IBM India), and Mathias Wagner (Nvidia Corporatio
 n)\n\nTag: Architectures, Compiler Analysis and Optimization, Heterogeneou
 s Systems, Performance, Tools\n\nRegistration Category: Tutorial Reg Pass
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