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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20260522T150116Z
LOCATION:C145
DTSTART;TZID=America/Chicago:20181112T083000
DTEND;TZID=America/Chicago:20181112T170000
UID:submissions.supercomputing.org_SC18_sess249_tut156@linklings.com
SUMMARY:Application Porting and Optimization on GPU-Accelerated POWER Arch
 itectures
DESCRIPTION:Dirk Pleiter (Juelich Supercomputing Centre), Christoph Haglei
 tner (IBM Zurich Research Laboratory), Andreas Herten (Juelich Supercomput
 ing Centre), Tom Papatheodore (Oak Ridge National Laboratory), Archana Rav
 indar (IBM India), and Mathias Wagner (Nvidia Corporation)\n\nThe POWER pr
 ocessor has re-emerged as a technology for supercomputer architectures. On
 e major reason is the tight integration of processor and GPU accelerator t
 hrough the NVLink technology. Two major sites in the US, ORNL and LLNL, ha
 ve already decided to have their pre-exascale systems being based on this 
 new architecture (Summit and Sierra, respectively). This tutorial will giv
 e an opportunity to obtain in-depth knowledge and experience with GPU-acce
 lerated POWER nodes. It focuses on porting applications to a single node a
 nd covers the topics architecture, compilers, performance analysis and tun
 ing, and multi-GPU programming. The tutorial will include an overview of t
 he NVLink-based node architectures, lectures on first-hand experience in p
 orting to this architecture, and exercises using tools to focus on perform
 ance.\n\nTag: Architectures, Compiler Analysis and Optimization, Heterogen
 eous Systems, Performance, Tools\n\nRegistration Category: Tutorial Reg Pa
 ss\n\n
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