BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260522T150107Z
LOCATION:C144
DTSTART;TZID=America/Chicago:20181111T133000
DTEND;TZID=America/Chicago:20181111T170000
UID:submissions.supercomputing.org_SC18_sess250@linklings.com
SUMMARY:Productive Parallel Programming for FPGA with High-Level Synthesis
DESCRIPTION:Productive Parallel Programming for FPGA with High-Level Synth
 esis\n\nAs the scale of large high performance computing systems increases
 , so does their power consumption, making energy efficiency a first class 
 citizen in their design. While GPUs and custom processors have improved th
 is situation significantly, reconfigurable architectures, such as FPGAs, p
 romise anoth...\n\n\nJohannes de Fine Licht and Torsten Hoefler (ETH Zuric
 h)\n\nTag: Heterogeneous Systems, Parallel Programming Languages, Librarie
 s, and Models\n\nRegistration Category: Tutorial Reg Pass
END:VEVENT
END:VCALENDAR
