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DTSTART:19700308T020000
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DTSTAMP:20260522T150129Z
LOCATION:D171
DTSTART;TZID=America/Chicago:20181113T163000
DTEND;TZID=America/Chicago:20181113T170000
UID:submissions.supercomputing.org_SC18_sess269_exforum119@linklings.com
SUMMARY:CCIX: Seamless Data Movement for Accelerated Applications
DESCRIPTION:Gaurav Singh (CCIX Consortium, Xilinx Inc)\n\nCCIX or Cache Co
 herent Interface for Accelerators is a chip-to-chip interconnect architect
 ure specification created to solve the performance and efficiency challeng
 es of emerging acceleration applications such as machine learning, network
  processing, storage/memory expansion, and analytics that combine processi
 ng and acceleration. \n\nThe CCIX Consortium has released the production r
 evision of the CCIX Base Specification 1.0 that enables seamless data shar
 ing in heterogeneous compute systems between CPUs, Accelerators and Memory
  expansion devices. The CCIX specification leverages the PCI Express™ 4.0 
 architecture and ecosystem while increasing the throughput to 25GT/s per l
 ane. \n\nIn this Exhibitor Forum, CCIX Consortium members will discuss the
  advancements CCIX brings to the system hardware and software architecture
 , and the use cases that benefit from the cache coherent shared virtual me
 mory paradigm and driverless data movement between processors and accelera
 tors including FPGAs, GPUs, network/storage adapters, intelligent networks
  and custom ASICs.\n\nTag: Data Management, System Software, Workflows\n\n
 Session Chair: Rebecca Hartman-Baker (National Energy Research Scientific 
 Computing Center (NERSC), Lawrence Berkeley National Laboratory (LBNL))\n\
 n
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