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DTSTART;TZID=America/Chicago:20181113T163000
DTEND;TZID=America/Chicago:20181113T164500
UID:submissions.supercomputing.org_SC18_sess279_drs126@linklings.com
SUMMARY:Efficient Deployment of Irregular Computations on Multi- and Many-
 Core Architectures
DESCRIPTION:Hancheng Wu and Michela Becchi (North Carolina State Universit
 y)\n\nMulti- and manycore processors have been advancing High Performance 
 Computing with their high throughput and power efficiency. There has been 
 an increasing interest in accelerating irregular computations on these dev
 ices that offer massive parallelism. My thesis focuses on compiler techniq
 ues and code transformations that facilitate the deployment of irregular c
 omputations on multi- and many-core processors, aiming to achieve higher p
 erformance and better programmability.  My contributions are below. We pro
 pose a compiler-based consolidation framework to improve the efficiency of
  irregular graph and tree computations written with Dynamic Parallelism on
  GPUs. We analyze and categorize parallel recursive tree traversal pattern
 s, then provide insights on how to select the platform and code template b
 ased on identified traversal patterns. We propose compiler techniques to s
 upport a SIMT programming model on Intel multi- and many-core architecture
 s with wide vector units, and point out the main challenges in supporting 
 the SIMT model, especially for irregular computations.\n\nTag: Architectur
 es, Memory, Runtime Systems, Storage, Doctoral Showcase\n\nRegistration Ca
 tegory: Workshop Reg Pass, Tutorial Reg Pass, Tech Program Reg Pass, Exhib
 its Reg Pass, Exhibits - Exhibit Hall Only Reg Pass\n\nSession Chair: Sanj
 ukta Bhowmick (University of North Texas)\n\n
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