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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20260522T150115Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181113T083000
DTEND;TZID=America/Chicago:20181113T170000
UID:submissions.supercomputing.org_SC18_sess322_post151@linklings.com
SUMMARY:Performance Evaluation of the NVIDIA Tesla V100: Block Level Pipel
 ining vs. Kernel Level Pipelining
DESCRIPTION:Xuewen Cui (Virginia Tech), Thomas R. W. Scogland and Bronis R
 . de Supinski (Lawrence Livermore National Laboratory), and Wu Feng (Virgi
 nia Tech)\n\nAs accelerators become more common, expressive and performant
 , interfaces for them become ever more important. Programming models like 
 OpenMP offer simple-to-use but powerful directive-based offload mechanisms
 . By default, these models naively copy data to or from the device without
  overlapping computation. Achieving performance can require extensive hand
 -tuning to apply optimizations such as pipelining. To pipeline a task, use
 rs must manually partition the task into multiple chunks then launch multi
 ple sub-kernels. This approach can suffer from high kernel launch overhead
 . Also, the hyper parameters must be carefully tuned to achieve optimal pe
 rformance. To ameliorate this issue, we propose a block-level pipeline app
 roach that overlaps data transfers and computation in one kernel handled b
 y different streaming multiprocessors on GPUs. Our results show that, with
 out exhaustive tuning, our approach can provide 95% to 108% stable perform
 ance compared to the best tuned results with traditional kernel-level pipe
 lining on NVIDIA V100 GPUs.\n\nRegistration Category: Tech Program Reg Pas
 s, Exhibits Reg Pass\n\n
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