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DTSTAMP:20260522T150110Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181114T083000
DTEND;TZID=America/Chicago:20181114T170000
UID:submissions.supercomputing.org_SC18_sess323_post229@linklings.com
SUMMARY:OpenACC to FPGA: A Directive-Based High-Level Programming Framewor
 k for High-Performance Reconfigurable Computing
DESCRIPTION:Seyong Lee (Oak Ridge National Laboratory), Jacob Lambert (Uni
 versity of Oregon), Jungwon Kim and Jeffrey S. Vetter (Oak Ridge National 
 Laboratory), and Allen D. Malony (University of Oregon)\n\nAccelerator-bas
 ed heterogeneous computing has become popular solutions for power-efficien
 t high performance computing (HPC).  Along these lines, Field Programmable
  Gate Arrays (FPGAs) have offered more advantages in terms of performance 
 and energy efficiency for specific workloads than other accelerators.  Nev
 ertheless, FPGAs have traditionally suffered several disadvantages limitin
 g their deployment in HPC systems, mostly due to the challenges of program
 mability and portability.  We present a directive-based, high-level progra
 mming framework for high-performance reconfigurable computing.  It takes a
  standard, portable OpenACC C program as input and generates a hardware co
 nfiguration file for execution on FPGAs.  We implemented this prototype sy
 stem in our open-source OpenARC compiler, which uses the Altera OpenCL com
 piler as its backend.  Preliminary evaluation of the proposed framework on
  an Intel Stratix~V with five OpenACC benchmarks demonstrates that our pro
 posed FPGA-specific compiler optimizations and novel OpenACC pragma extens
 ions assist the compiler in generating more efficient FPGA programs.\n\nRe
 gistration Category: Tech Program Reg Pass, Exhibits Reg Pass\n\n
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