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DTSTAMP:20260522T150111Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181115T083000
DTEND;TZID=America/Chicago:20181115T170000
UID:submissions.supercomputing.org_SC18_sess324_post154@linklings.com
SUMMARY:Binarized ImageNet Inference in 29us
DESCRIPTION:Tong Geng (Boston University, Pacific Northwest National Labor
 atory); Ang Li (Pacific Northwest National Laboratory); Tianqi Wang (Bosto
 n University); Shuaiwen Leon Song (Pacific Northwest National Laboratory);
  and Martin Herbordt (Boston University)\n\nWe propose a single-FPGA-based
  accelerator for ultra-low-latency inference of ImageNet in this work. The
  design can complete the inference of Binarized AlexNet within 29us with a
 ccuracy comparable to other BNN implementations.  We achieve this performa
 nce with the following contributions: 1. We completely remove floating-poi
 nt from NL through layer fusion. 2. By using model parallelism rather than
  data parallelism, we can simultaneously configure all layers and the cont
 rol flow graphs.  Also, the design is flexible enough to achieve nearly pe
 rfect load balancing, leading to extremely high resource utilization. 3. A
 ll convolution layers are fused and processed in parallel through inter-la
 yer pipelining. Therefore, in case the pipeline is full, latency is just t
 he delay of a single convolution layer plus the FC layers. Note that the d
 ependency pattern of the FC layer prevents it from being integrated into t
 he current pipeline.\n\nRegistration Category: Tech Program Reg Pass, Exhi
 bits Reg Pass\n\n
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