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DTSTART:19700308T020000
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DTSTAMP:20260522T150121Z
LOCATION:D173
DTSTART;TZID=America/Chicago:20181114T110000
DTEND;TZID=America/Chicago:20181114T113000
UID:submissions.supercomputing.org_SC18_sess487_exforum127@linklings.com
SUMMARY:OpenCAPI: High Performance, Host-Agnostic, Coherent Accelerator Ar
 chitecture and Ecosystem
DESCRIPTION:Brian Allison (OpenCAPI Consortium)\n\nThe Open Coherent Accel
 erator Processor Interface (OpenCAPI) is an industry standard architecture
  targeted for emerging accelerator solutions and workloads. OpenCAPI enabl
 es the development of host-agnostic devices which can coherently connect t
 o any CPU which supports the OpenCAPI standard, providing the device with 
 the capability to coherently cache host memory to facilitate faster accele
 rator execution. OpenCAPI utilizes high-frequency differential signaling t
 echnology while providing high bandwidth in addition to low latency needed
  by advanced accelerators. OpenCAPI encapsulates the serializing cache acc
 ess and address translation constructs in high speed host silicon technolo
 gy to minimize SW path length and design complexity in attached accelerati
 on silicon such as FPGAs and foundry ASICs. OpenCAPI architecturally ties 
 together Transaction Layer, Data Link Layer, and Physical Layer attributes
  to enable high bandwidth, highly parallel exploitation of attached silico
 n. Finally, this session will also cover all the OpenCAPI enabled servers 
 as well as the ecosystem that surrounds OpenCAPI.\n\nTag: Accelerators, Ar
 chitectures, GPUs\n\nSession Chair: Xiao Zhu (Purdue University)\n\n
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